ADC and DAC

16b Delta Sigma Stereo Audio ADC IP

This 16 bit ADC is a complete low cost stereo, audio Analog-to-Digital converter includes digital decimating filter, a third order (Mash2-1) Delta- Sigma ADC, a dc-removal filter. This device is fabricated on 40nm CMOS process, where high speed precision analog circuits are combined with high density logic circuits.

  • 16 BIT STEREO AUDIO ADC AUDIO INTERFACE
  • DC-Removal FILTER
  • 3.3 V/1.1 V analog/digital power supply respectively
  • Zero phase error between channels
  • Linear phase digital filtering
  • Power down mode (auto analog shutdown)
  • DC Attenuation upto -120dB
  • FSYNC and SCK internally generated

Deliverable

  • Detailed Specification and Integration guide
  • LEF abstract
  • GDSII layout and Mapping files
  • LVS compatible netlist
  • Verilog-A Model

10b-1MSPS SAR ADC IP

This is a 10-bit successive approximation Analog-to-Digital Converter (ADC). The IP features a high-speed, low-power design with 8 channels and operates from a single 3.3V power supply, achieving throughput rates of up to 1 MSPS. It includes a low-noise, wide-bandwidth track-and-hold amplifier capable of handling input frequencies above 20 MHz. Advanced design techniques enable very low power dissipation at high throughput rates, allowing for high-performance ADCs in compact packages suitable for demanding applications.

    • Output is 10 bit Parallel
    • Conversion time/Sampling frequency = 1 us/1Msps

CLOCK REQUIREMENT

    • 2.5 MHz- 20 MHz

SUPPLY REQUIREMENT

    • 3.3 V Analog/1.1 V Digital

PERFORMANCE

    • INL < +/- 1 LSB
    • DNL < +/- 0.8 LSB
    • OTHER FEATURES

    • Continuous conversion mode
    • Discrete conversion mode

Deliverables

  • Detailed Specification and Integration guide
  • LEF abstract
  • GDSII layout and Mapping files
  • LVS compatible netlist
  • Verilog-A Model

10b-160MHz ADC (802.11 AC AFE) IP

This ADC is a Dual Low area, Low Power 160 MHz,10 bit Pipelined Analog-to-Digital converter with complete internal reference.

  • Output is 10 bit Parallel
  • Conversion rate: 160 MHz max
  • Differential Input = 1.0 Vp-p
  • Low Power/Low Resolution Modes available
  • Latency = 3.5 cycles
  • Complete Internal reference/No need for any package pin or external decoupling capacitor.

Deliverables

  • Technical documents
  • Design Guide

10b-640Mbps (802.11 AC AFE) DAC IP

This is a high frequency dual channel current (source type) steering 10 bit Digital to Analog Converter (DAC). It can source the full scale output current 1.25mA.

    • 10 bit parallel binary unsigned inputs.
    • Full scale current (IFS): 1.25mA at a single output.
    • Maximum sampling frequency (Fs): 640 MHz.
    • Signal to Noise and Distortion Ratio (SNDR) on nyquist band: 57dB @ Fs= 640 MHz.

Deliverables

    • Technical documents
    • Design Guide

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